Charge Trapping Properties of Alternative High-k Dielectrics in MOS Devices

Abstract

High-k dielectrics are promising candidates to replace SiO2 in advanced integrated circuits in future space systems. Studies of the effects of ionizing radiation and bias-temperature stress (BTS) on high-k dielectrics were performed. Trapped charge densities are evaluated as functions of temperature and stress time. Prior radiation exposure enhances BTS-induced degradation in these devices. Worst-case responses in combined effects are positive (or zero) bias irradiation followed by NBTS for HfO2-based devices. Degradation due to oxide or interface trap-charge changes in magnitude with the bias polarity during switched-bias annealing either after irradiation or constant voltage stress (CVS). This demonstrates that metastable electron trapping (dominant during post-rad annealing) and hydrogen transport and reactions (dominant during post-CVS annealing) in the near-interfacial dielectric layers play significant roles in the defect formation process. Additional defect growth with time was observed as a result of additional charge injection through the gate stacks during the annealing process. These results provide insights into fundamental trapping properties of high-k dielectrics and can be used to help predict long-term reliability of these devices.