Show simple item record

Direct ionization-induced transient fault analysis for combinational logic and sequential capture in digital integrated circuits for lightly-ionizing environments

dc.creatorBlack, Dolores Archuleta
dc.date.accessioned2020-08-23T15:58:55Z
dc.date.available2011-12-05
dc.date.issued2011-12-05
dc.identifier.urihttps://etd.library.vanderbilt.edu/etd-11302011-123349
dc.identifier.urihttp://hdl.handle.net/1803/14909
dc.description.abstractDigital integrated circuits (ICs) fabricated in advanced semiconductor processes are susceptible to single event effects from lightly ionizing particles (e.g., alpha particles, protons, and muons). Furthermore, these ICs exhibit complex responses due to interactions with these particles. Characterizing the complex responses requires a translation across several layers of abstraction typically used to describe the IC (e.g., device, circuit, system). This dissertation presents a single integrated tool flow from radiation transport to IC response in order to provide simulations and/or predictions of the complex response for lightly ionizing particles. The tool flow can be used for simulations and/or predictions of the overall IC response through a framework that couples radiation transport, circuit-level simulation, and IC-level simulation. This framework tested the generation, propagation, and capture of particle strikes in the IBM 90-nm CMOS process for a subset of combinational cells that compose an Arithmetic Logic Unit (ALU). The research led to an increased understanding of appropriate techniques and available tools to model transient generation, propagation, and capture from energy deposition to IC response for the direct ionization caused by particles that have a linear energy transfer for lightly-ionizing environments.
dc.format.mimetypeapplication/pdf
dc.subjectFault Injection
dc.subjectIons
dc.subjectIonization
dc.subjectSingle Event Transient
dc.subjectSingle Event Effect
dc.subjectIntegrated Circuit
dc.subjectTransistor
dc.titleDirect ionization-induced transient fault analysis for combinational logic and sequential capture in digital integrated circuits for lightly-ionizing environments
dc.typedissertation
dc.contributor.committeeMemberDr. Gautam Biswas
dc.contributor.committeeMemberDr. Marcus H. Mendenhall
dc.contributor.committeeMemberDr. Ronald D. Schrimpf
dc.type.materialtext
thesis.degree.namePHD
thesis.degree.leveldissertation
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorVanderbilt University
local.embargo.terms2011-12-05
local.embargo.lift2011-12-05
dc.contributor.committeeChairDr. William H. Robinson
dc.contributor.committeeChairDr. Robert A. Reed


Files in this item

Icon

This item appears in the following Collection(s)

Show simple item record